signal input_4   : std_logic_vector(3 downto 0);

signal output_4a : integer;

signal output_4b : integer;

-- This line demonstrates the unsigned case

output_4a <= to_integer(unsigned(input_4));

-- This line demonstrates the signed case

output_4b <= to_integer(signed(input_4));

signal input_1   : integer;

signal output_1a : std_logic_vector(3 downto 0);

signal output_1b : std_logic_vector(3 downto 0);

-- This line demonstrates how to convert positive integers

output_1a <= std_logic_vector(to_unsigned(input_1, output_1a'length));

-- This line demonstrates how to convert positive or negative integers

output_1b <= std_logic_vector(to_signed(input_1, output_1b'length));